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Cadence Allegro and OrCAD 17.20.000-2016 HF051

Softwares   12-02-2019, 16:01   723   0   mitsumi
Cadence Allegro and OrCAD 17.20.000-2016 HF051

Cadence Allegro and OrCAD 17.20.000-2016 HF051 | 3.6 Gb

Cadence Design Systems, Inc. has released an update (HF051) to OrCAD Capture, PSpice Designer and PCB Designer 17.20.000-2016. This latest release reduces PCB development time by addressing the need to design reliable circuits for smaller, more compact devices.

CCRID Product ProductLevel2 Title

2015843 ADW LIBDISTRIBUTI Error for library distribution (lib_dist_client) regarding string index out-of-range
1869914 ADW PART_BROWSER Adding components to System Capture schematic canvas takes long time in Linux clusters
2010458 ADW PART_BROWSER RefDes values not appearing on parts
2022630 ADW PART_MANAGER Unable to successfully import a DE-HDL Design into System Capture
2005033 ALLEGRO_EDITOR 3D_CANVAS 3D Flex issues: Error message when opening design with bends in 3D viewer
2023496 ALLEGRO_EDITOR 3D_CANVAS Error for designs with bend in 3D Viewer
2033459 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
1996431 ALLEGRO_EDITOR ARTWORK Via holes for connection have incorrect coordinates in Gerber
1995656 ALLEGRO_EDITOR DATABASE Attaching and Detaching a text file created with SKILL writeTable() function corrupts the text file
2027122 ALLEGRO_EDITOR DATABASE PCB Editor crashes when creating Place Replicate module
2023916 ALLEGRO_EDITOR DFM DFF Annular Ring: Thru via pad to Mask violates on via in pad instances.
2024523 ALLEGRO_EDITOR DFM PCB Editor crashes in Mask To Trace check of DFF.
2021318 ALLEGRO_EDITOR IN_DESIGN_ANA Integrated Analysis and Checking: Unable to run simulation with Crosstalk flow
2014162 ALLEGRO_EDITOR NC Backdrill results using an OrCAD Professional license showing wrong values with hotfix 048
2010791 ALLEGRO_EDITOR PLACEMENT Setting dfa_pause_level to 3 and then moving and rotating part places the part with offset
2017112 ALLEGRO_EDITOR PLACEMENT place_boundary shown at wrong location when moved with User pick and footprints rotated
2028048 ALLEGRO_EDITOR PLACEMENT Rotate option using pick is rotating the outlines in different axis in view
2028314 ALLEGRO_EDITOR PLACEMENT Crash on moving components in Allegro PCB Editor
2029235 ALLEGRO_EDITOR PLACEMENT PCB Editor crashes when moving more than one component and hovering on IC
2022644 ALLEGRO_EDITOR SHAPE dv_fixfullcontact obsolete in release 17.2-2016
2023322 ALLEGRO_EDITOR SHAPE Gloss does not add teardrops on all clines.
2024235 ALLEGRO_EDITOR SHAPE Copper Pour disappears when area includes parts
2024531 ALLEGRO_EDITOR SHAPE rki_autoclip is not working at a special XY location
2024599 ALLEGRO_EDITOR SHAPE Cannot create round corner for shape
2024707 ALLEGRO_EDITOR SHAPE In-line void control does not work when there is no_shape_connect property attached
2026849 ALLEGRO_EDITOR SHAPE Cannot assign region name using the 'next' operation
2030156 ALLEGRO_EDITOR SHAPE Shape Area report for cross-hatched shape includes hatching and boundary
1852981 ALLEGRO_EDITOR SKILL Error message while creating Copper Mask layer without a name using SKILL not clear
1968054 ALLEGRO_EDITOR SKILL Document of axlClearObjectCustomColor should indicate that it can clear color for DBID of Net
2026429 ALLEGRO_EDITOR UI_FORMS PCB Footprint wizard: horizontal and vertical lead pitch level reversed in the image
1768032 ALLEGRO_EDITOR UI_GENERAL Numeric keypad does not work for file selection shortcut
1797376 ALLEGRO_EDITOR UI_GENERAL Release 17.2-2016: Padstack Designer saves padstack to the working directory when script is used
1798524 ALLEGRO_EDITOR UI_GENERAL Unable to save a padstack using script
1823031 ALLEGRO_EDITOR UI_GENERAL Help not working for OrCAD Productivity Toolbox
1849921 ALLEGRO_EDITOR UI_GENERAL Analyze menu missing in OrCAD PCB SI
1951740 ALLEGRO_EDITOR UI_GENERAL Trigger for 'open' does not work when opening a .dra file
1952163 ALLEGRO_EDITOR UI_GENERAL Analyze menu missing in OrCAD PCB SI
1982966 ALLEGRO_EDITOR UI_GENERAL SKILL command to access the Option window fields while in Interactive commands.
1983567 ALLEGRO_EDITOR UI_GENERAL Alias with Ctrl not working with 'command window history' variable enabled
1989507 ALLEGRO_EDITOR UI_GENERAL Third-party tool causes PCB Editor to stop responding to command
2003511 ALLEGRO_EDITOR UI_GENERAL Aliases using control (tilde) characters stopped working after upgrading to hotfix 048
2010418 ALLEGRO_EDITOR UI_GENERAL New command window breaks funckeys
2018201 ALLEGRO_EDITOR UI_GENERAL SKILL axlDBControl ('activeLayer /') updates active class/subclass but ministatus form not updated
2023468 ALLEGRO_EDITOR UI_GENERAL axlZoomInOut does not zoom out, always zooms in regardless of zoom factor (positive or negative)
2026428 ALLEGRO_EDITOR UI_GENERAL PCB Editor takes several minutes when saving a design
2032697 ALLEGRO_EDITOR UI_GENERAL Funckeys with Ctrl not working with 'command window history' variable enabled
2032717 ALLEGRO_EDITOR UI_GENERAL Funckey combinations, such as Ctrl + M, not working
2014211 ALLEGRO_VIEWER OTHER Arrow keys are not panning in Allegro Physical Viewer
2039081 CAPTURE NETLISTS Netlist not created: netlist fails for numeric pin names with backslash '\'
1993057 CONCEPT_HDL CONSTRAINT_MG Constraints disappear in hierarchical design (Electrical->Net->Routing->Relative Propagation Delay)
2004641 CONCEPT_HDL CONSTRAINT_MG 'Save Hierarchy' (hier_write) deletes bus object in Constraint Manager
2020901 CONCEPT_HDL CONSTRAINT_MG Incorrect match Groups created in CM (TDO design)
2014979 CONCEPT_HDL CORE The active schematic page randomly changes while editing text
2027905 CONSTRAINT_MGR DATABASE Pin Property changes in CM during uprev to release 17.2-2016
1762263 ORBITIO INTERFACES Add set allegro_orbit_import variable to user preference
2005860 PSPICE LIBRARIES Error when simulating design with TL494 part in release 17.2-2016
1980072 PSPICE SIMULATOR Noise in the waveform when using DELAYT and DELAYT1 with capacitor
1977615 RELEASE INTEGRATION Cannot import third-party schematics into OrCAD Capture in release 16.6
2027009 RF_PCB SETUP 'RF-PCB' - 'Setup' changes not saved on Apply
2002040 SIP_LAYOUT MANUFACTURING IPC 356 'ignore die layers' does not work: netlists to die
2024703 SIP_LAYOUT WLP Cannot Add Pin Text: Error on 'Manufacturing' - 'Documentation' - 'Display Pin Text'
2010045 SYSTEM_CAPTURE CANVAS_EDIT Cannot snap back vertical CAP until moved up and down horizontally
2010443 SYSTEM_CAPTURE CANVAS_EDIT Cannot select the CAP part
2012843 SYSTEM_CAPTURE PACKAGER Cannot short two grounds in the schematic
2015574 SYSTEM_CAPTURE PACKAGER System Capture is treating quotes in PTF files differently from DE-HDL
2022653 SYSTEM_CAPTURE VARIANT_MANAG Variant Editor - Allow Alternates where ALT_SYMBOL is a valid match for JEDEC_TYPE
2024742 TDA SHAREPOINT Accessing projects is taking time
2010531 XTRACTIM OTHER Allegro crash on repaint of command window
2022351 XTRACTIM OTHER XtractIM is crashing the latest HF S049

About Allegro and OrCAD 17.2-2016. The OrCAD 17.2-2016 release introduced new capabilities for OrCAD Capture, PSpice Designer, and PCB Designer 17.2-2016 that address challenges with flex and rigid-flex design as well as mixed-signal simulation complexities in IoT, wearables, and wireless mobile devices. This latest release reduces PCB development time by addressing the need to design reliable circuits for smaller, more compact devices.
- OrCAD Flex and Rigid-Flex Technologies
To enable a faster and more efficient flex and rigid-flex design creation critical to IoT, wearables and wireless devices, the OrCAD 17.2-2016 portfolio enables several new capabilities for flex and rigid flex design to minimize design iterations. Key flex and rigid flex features include: Stack-up by zone for flex and rigid-flex designs, Inter-layer checks for rigid-flex designs, Contour and arc-aware routing.
- New Cross-Section Editor
In the OrCAD PCB Designer 17.2-2016 release, the Cross-Section Editor has been redesigned to leverage the underlying spreadsheet technology found in the Constraint Manager. It offers a one-stop shop for features that require the cross section for their setup, such as dynamic unused pad suppression and embedded component design. The Cross-Section Editor has been enhanced to support multiple stackups for rigid-flex design, each capable of supporting conductor and non-conductor layers such as Soldermask and Coverlay.
- New Padstack Editor
A new Padstack Editor has been introduced in OrCAD PCB Editor 17.2-2016 to ease padstack creation through a new modern user interface. In addition to supporting new pad geometries, drill types, additional attributes, and additional mask layers ability to define keep-outs within the padstack with complex geometries for all objects, the new capabilities allow PCB librarians to help PCB designers streamline the design process for complex padstacks, and also the commonly used padstacks.
- OrCAD PCB Designer 17.2-2016 Features
The OrCAD PCB Designer 17.2-2016 release also include new features or enhancements targeted towards improving PCB editors' productivity and ease-of-use. Other new features include: Via2via Line Fattening (HDI), Display Segments Over Voids, Layer Set Based Routing, Diff Pair Routing and DRC, Full Xnet Support, Gloss Commands, Contour Routing, and many more.
- OrCAD Capture Design Difference Viewer
The Graphical Design Difference Viewer is a powerful, real-time, design difference, visual review utility in OrCAD Capture with the ability to perform logical as well as graphical comparisons on a page-by-page basis. The Graphical Design Difference Viewer generates an interactive single-report HTML file that is platform and tool independent, a unique viewing feature to identify the differences leading to changes in circuit behavior as well as differences based on individual object level, thereby helping address the specialized needs of the users.
- Advanced Annotation
With the newly introduced Advanced Annotation feature supported by OrCAD Capture, users can assign reference ranges hierarchically by automatically assigning values and perform annotation on the whole design, on hierarchy block at any level, page and property block, giving them complete control over their component annotation process in the design cycle.
- PSpice Virtual Prototyping
The new virtual prototyping functionality introduced in PSpice helps electrical engineers overcome design challenges by automating the code generation for multi-level abstraction models written in C/C++ and SystemC. This functionality assists them in generating code requiring limited coding capabilities by design engineers and thereby making the process of virtual prototyping extremely convenient and easy.

Note: The ADW product line, individual ADW products, and product family names have been rebranded in release 17.2-2016. The Allegro Design Workbench (ADW) is now referred to as Allegro Engineering Data Management (EDM). For the full list of new and improved features, and fixed bugs please refer to the release notes located

About Hot-Fix. A Hot-Fix enables a customer to receive fixes for urgent problems, without having to wait for the next service pack. Unlike Service Packs (SP), which are scheduled, periodic releases, Hot-Fix releases are not periodically scheduled. Simply requesting a Hot-Fix does not automatically guarantee that the customer will receive it: all Hot-Fix requests first must be approved and accepted by Cadence prior to delivery. Furthermore, a Hot-Fix may contain fixes related to problems reported earlier by different customers. All the files included in the Hot-Fix will nevertheless be installed.

About Cadence. Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry.

Product: Cadence Allegro and OrCAD (Including EDM)
Version: 17.20.000-2016 HF051
Supported Architectures: x64
Website Home Page :

Language: english
System Requirements: PC
Supported Operating Systems: Windows 7even or newer / 2008 Server R2 / 2012 Server
System Requirements: Cadence Allegro and OrCAD (Including EDM) version 17.20.000-2016 and above
Size: 3.6 Gb

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